The invention relates to temperature-compensated current sources, and more particularly to two-terminal current sources that include (1) ".DELTA.V.sub.BE over R" circuits generating a first current with a positive temperature coefficient, and (2) other circuitry, such as a V.sub.BE voltage applied across a resistor, generating a second current with a negative temperature coefficient, in which the first and second currents are summed to produce the total temperature-compensated current flowing through the two-terminal current source.
Many analog circuits and systems require a two-terminal current reference circuit that is insensitive to the "compliance voltage", i.e. the voltage between the two terminals of the current source, the current of which has a zero or selectable temperature coefficient. (As used herein, the term "two-terminal reference circuit" or "two-terminal current source" refers to a two-terminal circuit which receives only a certain current from a first terminal and applies only that same current to a second terminal.)
One typical application for a two-terminal current source would be to provide a bias current for a leg of a bridge circuit. Another typical application would be a bipolar integrated circuit including a number of PNP current mirror circuits and a number of NPN current mirror circuits which all are controlled in response to a single two-terminal current source, such as a JFET.
U.S. Pat. No. 4,460,865 (Bynum, et al.) discloses a precise temperature-compensated voltage reference circuit that generates a voltage V.sub.BE having a negative temperature coefficient and a voltage .DELTA.V.sub.BE having a positive temperature. The voltage V.sub.BE is applied across a first resistor to produce a current with a negative temperature coefficient. The voltage .DELTA.V.sub.BE is applied across a second resistor to produce a current having a positive temperature coefficient. The two currents are summed to produce a control current that is forced through a third resistor. A first terminal of the third resistor is connected to a supply voltage conductor, and a second terminal of the third resistor produces a temperature-compensated reference voltage. By properly scaling the first and second resistors, a wide range of temperature coefficients can be selected for the output reference voltage. The first and second resistors are connected to a ground voltage conductor. Components controlling the currents flowing through the transistors generating the V.sub.BE voltage and the .DELTA.V.sub.BE voltage are connected to a positive supply voltage. Although this circuit functions adequately as a temperature-compensated voltage reference circuit, it is not practical for use as a two-terminal reference current source the terminal voltages of which may be indeterminate, because an electrically floating power supply referenced to one of the reference current source terminals would be required.
U.S. Pat. No. 4,472,675 (Shinomiya) discloses a reference voltage generating circuit, the terminals of which are connected to a ground voltage conductor T2 and a positive supply reference voltage conductor T1. The circuit generates a .DELTA.V.sub.BE voltage across a first resistor, to generate a first current having a positive temperature coefficient. A second circuit generates a V.sub.BE voltage across a second resistor to generate a second current having a negative temperature coefficient. The first current is utilized to drive a first current mirror circuit to generate a third current having a positive temperature coefficient, and the second current is used to drive a second current mirror circuit to generate a fourth current having a negative temperature coefficient. The third and fourth currents are summed, and the resulting current flows through a third resistor to the ground voltage conductor to generate a temperature-compensated reference voltage. The temperature dependence of this reference voltage can be selected by selecting resistance values of the first and second resistors. This circuit is complex, as it includes 13 transistors and three resistors.
Although the Shinomiya reference contains no suggestion that the circuit disclosed therein could be connected as a two-terminal current source, the current flowing from the positive power supply into terminal T1 is the same current that flows out of terminal T2 into the ground reference conductor, and this current represents the sum of the five "positive-temperature-coefficient" currents flowing through transistors Q9, Q10, Q11, Q12, and Q13, and the sum of the "negative-temperature-coefficient" currents flowing through transistors Q5, Q6, and Q7. The large number of transistors of this circuit would cause it to occupy far too much semiconductor chip area to be practical as a two-terminal current source. The large number of current mirrors would cause currents flowing through terminals T1 and T2 to have more noise than would be acceptable in many circuits that might require a precision temperature-compensated two-terminal current source. The Shinomiya technique for coupling the .DELTA.V.sub.BE generating circuitry and the V.sub.BE generating circuitry requires that the two transistors directly generating the .DELTA.V.sub.BE voltage and the one transistor generating the V.sub.BE voltages be located sufficient1y far apart that thermal temperature gradients in the silicon would introduce another source of error. Furthermore, if the Shinomiya circuit were to be used as a two-terminal current source, an unduly complex start-up circuit would have to be provided to supply initial currents to the many transistor collectors that initially would be electrically "floating". The start-up circuit would have to be such that its influence on the various collector currents would be negligible after start-up operation was complete. These considerations make it even more impractical to use the Shinomiya circuit as a two-terminal current source.
There is an unmet need for a simple, highly precise, low noise two-terminal temperature compensated current source circuit having a high degree of voltage compliance.